1. Field of the invention
This invention relates to a method for manufacturing a semiconductor device comprising forming elements such as damascene interconnects and an interlayer connecting hole by a plating technique; and a plating apparatus and a sputtering apparatus therefor.
2. Description of the related art
A sputtering or CVD technique has been commonly used as a metal-film deposition procedure for forming interconnects and an inter-layer connecting hole in a semiconductor device. These techniques, however, require a considerable cost and a complicated process because a great deal of energy is applied to a metal compound to liberate or separate the metal from the corresponding metal compound for depositing the metal on a surface where a semiconductor device will be formed. Furthermore, sputtering may not provide adequate coverage. To solve these problems, electroplating for depositing a metal film has recently received attention.
A conventional manufacturing process for a semiconductor device will be described with reference to FIG. 5 in terms of forming damascene copper interconnects.
An insulating film 2 is deposited on a silicon substrate 1 and then a groove 5 is formed in a given area. Then, on the overall surface is deposited by sputtering a barrier-metal film 3 consisting of TiN e.g., 20 nm of thickness. Then, on the surface is deposited by sputtering a seed-metal film 4 consisting of copper for growing copper plating (FIG. 5(a)). The sputtering conditions are, for example, as follows; a substrate temperature: 0xc2x0 C., a sputter power: 2 kW, a pressure: 2 mTorr, and a distance between a target and the substrate: 60 mm.
Then, the substrate is subject to plating by immersing it in an aqueous solution of cupric sulfate at an ambient temperature.
The plated substrate is left at an ambient temperature to stabilize the structure of the copper (FIG. 5(b)). The treatment is hereinafter referred to as xe2x80x9cself-annealingxe2x80x9d. Duration for the self-annealing is generally about 50 to 80 hours.
Then, the substrate surface is smoothed by chemical mechanical polishing (CMP) to form damascene copper interconnects.
The prior art has the following problems.
First, a void may be generated inside the groove or the hole due to shrinkage of the copper plating during the self-annealing step. A copper plating has a sparse structure immediately after plating. After self-annealing the copper structure gradually comes to be thermodynamically stable as grains grow. In the course of the process, copper shrinks to generate a void inside the groove as shown in FIG. 5(b).
Second, small grains in a seed-metal film deposited for forming a plating layer remain after the self-annealing, leading to a less reliable device.
To solve the above problems, an object of this invention is to prevent void generation inside a groove or hole during forming damascene interconnects or an inter-layer connecting hole. Another object of this invention is to eliminate residual small grains in a seed-metal film for improving reliability of a device.
This invention provides a method for manufacturing a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate and then forming a groove or hole in a given area of the insulating film;
forming a barrier-metal film filling the groove or hole;
forming a seed-metal film on the barrier-metal film formed inside the groove or hole; and
forming the first plating film on the seed-metal film using a metal material;
conducting the first annealing for a given period;
forming the second plating film consisting of the above metal material on the first plating film; and
conducting the second annealing for a given period.
Plating for forming damascene interconnects has been conventionally conducted in a single step in the light of various factors such as yield. On the other hand, according to this invention, a plating film is formed in two separate steps (hereinafter, referred to as a xe2x80x9cdivided platingxe2x80x9d technique) to prevent void generation inside a groove or hole. Specifically, void generation can be avoided in a groove for forming damascene interconnects or a hole for forming an inter-layer connecting hole. In this invention, the first annealing is conducted after the first plating, i.e., the annealing is conducted when the plating film is thin. The absolute amount of the metal used in the plating process is therefore so small that its shrinkage is reduced and thus a frequency of void generation may be minimized. Even when a void is generated, the film thickness of the plating film is thin in the first annealing, i.e., the distance between the void and the plating surface is short, so that the void may easily disappear. As described above, void generation can be prevented inside the groove or hole.
In this invention, annealing may be self-annealing at an ambient temperature or hot-annealing at an elevated temperature, e.g., 300xc2x0 C. or higher. Hot-annealing has an advantage of reduction in an annealing time. For example, an annealing time may be about 30 min at a heating temperature of 300xc2x0 C.
In the method for manufacturing a semiconductor device, the thickness of the first plating film can be 0.1 to 0.5 folds of the width of the groove or hole.
This invention also provides a method for manufacturing a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate and then forming a groove or hole in a given area of the insulating film;
forming a barrier-metal film filling the groove or hole;
forming a seed-metal film on the barrier-metal film formed inside the groove or hole; and
forming a plating film on the seed-metal film using a metal material, and then conducting annealing for a given period; and
where the metal plating film is formed at a plating temperature of 65 to 100xc2x0 C.
As described above, shrinkage of a plating metal film is effectively minimized for preventing void generation inside a groove or hole, which may be achieved by plating at a higher temperature of 65 to 100xc2x0 C. in the method of this invention (hereinafter, referred to as a xe2x80x9chot platingxe2x80x9d technique). A metal plating film for forming damascene interconnects has been commonly formed at a relatively lower temperature from an ambient temperature to 60xc2x0 C. Especially, using copper, the process is generally conducted at an ambient temperature. On the other hand, we have found that when plating is conducted at a higher temperature of 65xc2x0 C. or higher, grains grow substantially simultaneously with deposition, which can significantly reduce shrinkage of the plating metal film after deposition, prevent void generation and reduce an annealing time. The effects are particularly remarkable at a temperature of 65xc2x0 C. or higher, and more remarkable at 80xc2x0 C. or higher although a temperature of 100xc2x0 C. or higher may be undesirable due to foaming during the plating process.
This invention also provides a method for manufacturing a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate and then forming a groove or hole in a given area of the insulating film;
forming a barrier-metal film filling the groove or hole;
forming a seed-metal film on the barrier-metal film formed inside the groove or hole;
forming a plating film on the seed-metal film using a metal material while distorting the semiconductor substrate into a concave where the center of the surface to be plated extrudes; and
conducting annealing for a given period.
In a conventional plating process, a residual tensile stress is generated when a metal material which may initiate self-annealing is used. Such a residual stress is probably generated due to shrinkage of a plating film in association with increase of the grain size of the plating metal during the self-annealing process after forming the plating film.
In other words, a tensile stress in a plating film may act in a direction interfering with shrinkage of the plating film, resulting in inhibiting self-annealing associated with shrinkage of the plating film. Thus, it may be expected that a plating film can be formed in a manner that a compressive stress is generated in the film, to allow a stress to act in a direction enhancing shrinkage of the plating film, i.e., to accelerate self-annealing. This invention is based on the idea. In the method of this invention, a plating film is formed while distorting the semiconductor substrate into a concave shape where the center of the surface to be plated extrudes. Thus, the plating film in which a compressive stress is generated may be formed. It may lead to reducing a self-annealing time and preventing void generation in the groove or hole. The expression, xe2x80x9cdistorting the semiconductor substrate into a concave shape where the center of the surface to be plated extrudesxe2x80x9d means that the substrate is curved into a concave shape where the center of the surface to be plated extrudes like, for example, a substrate 21 in FIG. 7.
This invention also provides a method for manufacturing a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate and then forming a groove or hole in a given area of the insulating film;
forming a barrier-metal film filling the groove or hole;
forming a seed-metal film on the barrier-metal film formed inside the groove or hole in a manner that a residual compressive stress is generated in the seed-metal film;
forming a plating film on the seed-metal film using a metal material and then conducting annealing for a given time.
A seed-metal film for forming a plating film has been conventionally formed by, for example, sputtering, in which a residual tensile stress is generated in the seed-metal film. Such a residual tensile stress may probably act in a direction interfering with shrinkage of the plating film formed on the seed-metal film. So, a residual tensile stress in the seed-metal film may interfere with self-annealing associated with shrinkage of the plating film. Thus, it may be expected that by generating a residual compressive stress in the seed-metal film, the stress acts in a direction enhancing shrinkage of the plating film, i.e., enhancing self-annealing. According to the method of this invention based on the idea, a self-annealing time may be reduced and void generation may be avoided in the groove or hole.
There may be a variety of methods for generating a residual compressive stress. The followings are, for example, preferable.
The first is a method for manufacturing a semiconductor device where the seed-metal film is formed by sputtering, characterized in that the seed-metal film is formed while distorting the semiconductor substrate into a concave shape toward a target. Thus, when the substrate is removed from a sputtering apparatus, a residual compressive stress is generated in the seed-metal film.
The second is a method characterized in that the seed-metal film is formed by collimate sputtering. It has been found from our studies that a residual compressive stress may be generated in the seed-metal film when using a collimate sputtering technique.
This invention also provides a method for manufacturing a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate and then forming a groove or hole in a given area of the insulating film;
forming a barrier-metal film filling the groove or hole;
forming a seed-metal film on the barrier-metal film formed inside the groove or hole; and
forming a plating film on the seed-metal film using a metal material; and
where the seed-metal film is (111) oriented.
This invention also provides a method for manufacturing a semiconductor device comprising the steps of:
forming an insulating film on a semiconductor substrate and then forming a groove or hole in a given area of the insulating film;
sequentially forming a Ti film and a TiN film filling the groove or hole;
forming a seed-metal film on the TiN film formed inside the groove or hole; and
forming a plating film on the seed-metal film using a metal material; and
where the seed-metal film is (111) oriented.
A seed-metal film is less (111) oriented in the prior art, but a metal, e.g., copper, film on the seed-metal film tends to be (111) oriented. Thus, small grains often remain in the seed-metal film after annealing. On the other hand, in the method for manufacturing a semiconductor device according to this invention, a seed-metal film is (111) oriented to effectively minimize residual small grains. A seed-metal film having (111) orientation may be formed by, for example, sequentially forming a Ti film and a TiN film filling a groove or hole formed in an insulating film and then forming a seed-metal film. As described above, forming a TiN film and then a TiN film may improve the orientation of the TiN film, resulting in a (111) oriented seed-metal film on the TiN film.
In these methods for manufacturing a semiconductor device, a material for the seed-metal film and the above metal material are preferably Cu, Ag or an alloy thereof. The metal materials may initiate self-annealing to provide a metal film suitable for a semiconductor device. Although these metal materials have a lower resistance and have an advantage that they minimize problems such as electromigration, they may cause a problem of frequent void generation during a plating or self-annealing process. The metal materials may be, therefore, used for significantly enhancing the effects of this invention.
These methods for manufacturing a semiconductor device may be employed in combination. For example, in a divided plating technique, the first and/or the second plating films may be formed by hot plating. In divided plating, hot plating or a combination thereof, a semiconductor substrate may be plated while being distorted into a concave shape or a seed-metal film may be formed in a manner that a residual compressive stress is generated. Since these techniques are not harmful each other, these may be combined to be synergically effective for more remarkably inhibiting a void and reducing a self-annealing time.
This invention also provides a plating apparatus and a sputtering apparatus used for manufacturing a semiconductor device according to the method of this invention.
Specifically, this invention provides plating apparatus comprising a plating-solution feeding tank for feeding a plating solution, a plurality of plating baths for plating a substrate placed therein, and a liquid-circulating line interconnecting the plating-solution feeding tank and the plating bath for circulating the plating solution, the individual plating baths being separately provided with a temperature-adjusting means.
This plating apparatus is provided with separate temperature-adjusting means in its individual plating baths. One plating apparatus may, therefore, simultaneously plate a plurality of substrates at different plating temperatures to improve yield. For example, plating at an ambient temperature and hot plating suggested in this invention may be simultaneously conducted in a single plating apparatus. In a method suggested in this invention where plating is divided into two steps, the above plating apparatus may be effective when the first and the second steps are conducted at different temperatures. Using the above plating apparatus may reduce the required number of the plating apparatus, which may contribute space-saving for installing the apparatuses.
This invention also provides plating apparatus comprising a plating-solution feeding tank for feeding a plating solution, a plurality of plating baths for plating a substrate placed therein, and a liquid-circulating. line interconnecting the plating-solution feeding tank and the plating bath for circulating the plating solution; the plating baths having an electrode and a substrate holder for placing a substrate to be treated facing the electrode and the substrate holder having a means for distorting the substrate. The term xe2x80x9cdistortingxe2x80x9d indicates that the substrate is distorted into a convex or concave shape.
This invention also provides the above plating apparatus where the means for distorting the substrate to be treated is a pressing means for applying pressure to the substrate on its rear face and the pressing means applies a pressure to the center of the substrate different from that to its side.
These plating apparatuses are suitable for conducting a method for manufacturing a semiconductor comprising a step that a semiconductor substrate is plated while being distorted into a concave shape, to form a plating film. Using these plating apparatuses, a substrate may be distorted into a concave shape for plating without being deteriorated, leading to reduction in a self-annealing time and prevention of void generation inside a groove or hole. In particular, a plating apparatus equipped with the above pressing means can precisely control the deformation of a substrate (extent of distortion) by adjusting a pressure, allowing the deformation to be set to the most effective value for, e.g., reduction of a self-annealing time.
The means for distorting a substrate to be treated in the above plating apparatuses, for example, distorts the substrate into a concave in a manner that the center of the substrate extrudes toward the electrode. The pressing means in the plating apparatuses may, for example, apply a higher pressure to the center of the substrate to be treated than that to its side.
This invention also provides a sputtering apparatus comprising a chamber equipped with an exhaust system; a target placed in a given position in the chamber; an electrode generating sputter discharge for sputtering the target; and a substrate holder for retaining a substrate to be treated facing and parallel to the target, the substrate holder having a means for distorting the substrate. The expression xe2x80x9cdistortingxe2x80x9d herein means deforming a substrate into a convex or concave.
Self-annealing of a plating film may be accelerated by generating a residual compressive stress in a seed-metal film. A residual compressive stress may be effectively generated in a seed-metal film by forming the film while distorting a substrate to be treated into a concave toward the target. The sputtering apparatus of this invention is suitable for conducting the procedure. Using the sputtering apparatus, the substrate distorted into a concave can be sputtered to generate a compressive stress in the seed-metal film when the substrate is removed from the apparatus. A plating film is formed on the substrate. Then self-annealing may be conducted, leading to reduction in a self-annealing time. This sputtering apparatus has an advantage that distortion of a substrate can be controlled to appropriately adjust a compressive stress.
In particular, a sputtering apparatus equipped with the above pressing means can easily distort a substrate to form a good seed-metal film. Furthermore, deformation (extent of distortion) may be precisely controlled by adjusting a pressure, which allows the deformation of the substrate to be set to the most effective value for, e.g., reduction in a self-annealing time.
The means for distorting a substrate to be treated in the above sputtering apparatus, for example, distorts the substrate into a concave shape in a manner that the center of the substrate extrudes toward the electrode. The pressing means in the sputtering apparatus may, for example, apply a higher pressure to the center of the substrate to be treated than that to its side.
As described above, in a method for manufacturing a semiconductor device according to this invention, a plating metal film is formed in two separate steps or at an elevated temperature of 65 to 100xc2x0 C., leading to inhibiting void generation inside a groove or hole and further reduction in a self-annealing time in hot plating.
In a method for manufacturing a semiconductor device according to this invention, a substrate distorted into a concave shape is plated or a seed-metal film is formed in a manner that a residual compressive stress is generated. It can accelerate self-annealing involving shrinkage of a plating film, i.e., reduction in a self-annealing time. Furthermore, void generation inside a groove or hole may be inhibited.
In a plating apparatus according to this invention, each plating bath is equipped with a separate temperature-adjusting means, which permits simultaneous plating of a plurality of substrates at different plating temperatures in a single plating apparatus, leading to improvement of an yield.
Using a plating apparatus according to this invention, a substrate distorted into a concave shape can be plated to generate a desired compressive stress in a plating film, leading to reduction in a self-annealing time.
Using a sputtering apparatus according to this invention, a substrate distorted into a concave shape can be subject to sputtering to generate a desired compressive stress in a seed-metal film, leading to reduction in a self-annealing time.